september 2012 ?2012 fairchild semiconductor corporation FDMC8622 rev.c2 www.fairchildsemi.com 1 FDMC8622 n-channel power trench ? mosfet FDMC8622 n-channel power trench ? mosfet 100 v, 16 a, 56 m features max r ds(on) = 56 m at v gs = 10 v, i d = 4 a max r ds(on) = 90 m at v gs = 6 v, i d = 3 a high performance trench technology for extremely low r ds(on) high power and current handling capability in a widely used surface mount package 100% uil tested termination is lead-free and rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced power trench ? process that has been optimized for r ds(on) , switching performance and ruggedness. application dc-dc primary switch g s s s d d d d 5 6 7 8 3 2 1 4 mlp 3.3x3.3 d d d d s s s g mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 100 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c 16 a -continuous (silicon limited) t c = 25 c 16 -continuous t a = 25 c 4 -pulsed 30 e as single pulse avalanche energy (note 3) 37 mj p d power dissipation t c = 25 c 31 w power dissipation t a = 25 c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case (note 1) 4.0 c/w r ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity FDMC8622 FDMC8622 mlp 3.3x3.3 13 ?? 12 mm 3000 units
FDMC8622 n-channel power trench ? mosfet www.fairchildsemi.com 2 ?2012 fairchild semiconductor corporation FDMC8622 rev.c2 electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 100 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 69 mv/c i dss zero gate voltage drain current v ds = 80 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a22.94v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -9 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 4 a 43.7 56 m v gs = 6 v, i d = 3 a 59.9 90 v gs = 10 v, i d = 4 a, t j = 125 c 76.4 98 g fs forward transconductance v dd = 10 v, i d = 4 a 8.9 s c iss input capacitance v ds = 50 v, v gs = 0 v, f = 1 mhz 302 402 pf c oss output capacitance 72.5 96 pf c rss reverse transfer capacitance 4.2 6 pf r g gate resistance 1.0 t d(on) turn-on delay time v dd = 50 v, i d = 4 a, v gs = 10 v, r gen = 6 5.9 12 ns t r rise time 1.6 10 ns t d(off) turn-off delay time 10.2 18 ns t f fall time 2.2 10 ns q g(tot) total gate charge v gs = 0 v to 10 v v dd = 50 v, i d = 4 a 5.2 7.3 nc q g(tot) total gate charge v gs = 0 v to 5 v 3.0 4.1 nc q gs total gate charge 1.4 nc q gd gate to drain ?miller? charge 1.4 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 4 a (note 2) 0.8 1.3 v v gs = 0 v, i s = 1.7 a (note 2) 0.8 1.2 t rr reverse recovery time i f = 4 a, di/dt = 100 a/ s 36 57 ns q rr reverse recovery charge 28 45 nc notes: 1. r ja is determined with the device mounted on a 1in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. starting t j = 25 c; n-ch: l = 3.0 mh, i as = 5.0 a, v dd = 100 v, v gs = 10 v. 50 c/w when mounted on a 1 in 2 pad of 2 oz copper 125 c/w when mounted on a minimum pad of 2 oz copper a. b.
FDMC8622 n-channel power trench ? mosfet www.fairchildsemi.com 3 ?2012 fairchild semiconductor corporation FDMC8622 rev.c2 typical characteristics t j = 25c unless otherwise noted figure 1. 01234 0 5 10 15 20 25 30 v gs = 5 v v gs = 10 v v gs = 6 v pulse duration = 80 s duty cycle = 0.5%max v gs = 7 v v gs = 6.5 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 5 10 15 20 0 1 2 3 4 v gs = 10 v pulse duration = 80 s duty cycle = 0.5%max normalized drain to source on-resistance i d , drain current(a) v gs = 6.5 v v gs = 6 v v gs = 5 v v gs = 7 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 i d = 4 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 246810 0.0 0.1 0.2 0.3 0.4 0.5 i d = 4 a t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5%max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0369 0 5 10 15 20 25 30 t j = 25 o c t j = -55 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5%max t j = 150 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.4 0.6 0.8 1.0 1.2 0.1 1 10 40 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMC8622 n-channel power trench ? mosfet www.fairchildsemi.com 4 ?2012 fairchild semiconductor corporation FDMC8622 rev.c2 figure 7. 0123456 0 2 4 6 8 10 i d = 4 a v dd = 25 v v dd = 50 v v gs , gate to source voltage(v) q g , gate charge(nc) v dd = 75 v gate charge characteristics figure 8. 0.1 1 10 100 1 10 100 1000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 1 2 3 4 5 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche(ms) i as , avalanche current(a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 5 10 15 20 v gs = 10 v r jc = 4.0 o c/w v gs = 6 v i d , drain current (a) t c , case temperature ( o c ) limited by package m a x i m u m c o n t i n u o u s d r a i n c u r r e n t v s c a s e t e m p e r a t u r e figure 11. 0 .01 0.1 1 10 1 00 500 0.0 01 0.01 0.1 1 10 100 100 s 10 m s 10 s 100 ms dc 1 s 1 ms i d , d rai n cu rrent (a) v ds , drai n to source volt age (v) this area is l imited by r ds(on) si ngle pulse t j = max rated r ja = 125 o c/w t a = 25 o c fo rw ard bi as safe operating area figure 12. 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 1000 single pulse r ja = 125 o c/w t a = 25 o c v gs = 10 v p ( pk ) , peak transient power (w) t, pulse width (s) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25c unless otherwise noted
FDMC8622 n-channel power trench ? mosfet www.fairchildsemi.com 5 ?2012 fairchild semiconductor corporation FDMC8622 rev.c2 figure 13. junction-to-ambient tran sient thermal response curve 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.0001 0.01 0.1 1 single pulse r ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a typical characteristics t j = 25c unless otherwise noted
FDMC8622 n-channel power trench ? mosfet www.fairchildsemi.com 6 ?2012 fairchild semiconductor corporation FDMC8622 rev.c2 dimensional outline and pad layout
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